1. Field of the Invention
The present invention relates to a capacitor in a semiconductor device, and more particularly, to a method of fabricating a capacitor in a semiconductor device and semiconductor device using the same. Although the present invention is suitable for a wide scope of applications, it is particularly suitable for enhancing capacitance and robustness of a capacitor by increasing the effective surface area of the coupling (interface) between upper and lower electrodes of an MIM capacitor.
2. Discussion of the Related Art
Semiconductor memory devices having a chip structure including a memory cell array and a peripheral circuit are being widely used for multimedia function enhancement applications. A core technology in such devices is the fabrication of a capacitor, having a structure comprised essentially of upper and lower electrodes separated by a dielectric (insulating) layer, suitable for a high-speed processing of large quantities of data by providing a very large multitude of such capacitors on a single chip. The capacitor structure may be generally categorized, according to the species of the electrodes, as a polysilicon-insulator-polysilicon (PIP) capacitor or a metal-insulator-metal (MIM) capacitor.
The PIP capacitor, which is typical of a dynamic random access memory device but has been used as an analog-type capacitor, is often favored for design rules of up to 180 nm. The polysilicon used as the upper and lower electrodes of the PIP capacitor, however, increases the specific resistance and may bring about unacceptably high parasitic capacitances due to depletion effects. Therefore, for design rules below 130 nm, the MIM capacitor has been employed. Yet, the metal used as the electrodes of the MIM capacitor exhibits low thermal stability, which prohibits a high-temperature processing (e.g., annealing) of the chip to impart a sufficient device robustness for the formation of complex structures. It should be appreciated that increased capacitance may be achieved through a complex electrode structure formation, which augments (enlarges) the effective surface area between electrodes.
Thus, the MIM capacitor has been limited to a generally flat structure, which tends to increase chip area and thus makes high integration difficult, which is a demand of high-performance memory devices, such as magnetic RAM devices and other next-generation memory devices. Meanwhile, minimum capacitance values are difficult to achieve together with high device integration.